Implementation of Compressor Based Vedic 32x32 Bit Multiplier

Authors:S. DIVYA REKHA, K. JAYASREE, H. CHANDRASEKHAR, L. RAMAMURTHY

1345-1348

An High Performance Ultra-Sound Transducers using BCD Technology

Authors:MADDI RANJITH, V.SUMALINI

1349-1352

Area Delay Power Efficient Carry Select Adder

Authors:K. LAVANYA DEVI, DR. N. CHITRA

1353-1357

An Efficient Low Latency Low Complexity Architecture for Matching of Information Coded with Error–Correcting Codes

Authors:THOPSI GNANESWAR, P. KULLAYA SWAMY

1358-1362

Design and Analysis 0f Energy-Efficient and Very High Speed Conditional Push-Pull Pulsed Latches

Authors:K. LINGANNA, KERHEPALLI MALLIKARJUNA

1363-1369

Operation of the Low Power Sub-Threshold SRAM Cell Architecture

Authors:B. PRAVEEN KUMAR, N. RAMANJANEYULU

1370-1376

Implementation of Data Encoding Technique for Network Interfaces

Authors:G. ANUSHA, G. SEKHAR REDY, S. KISHORE BABU

1377-1383

Dual Dynamic Node Hybrid Flip-Flop Design using Embedded Logic

Authors:KURMINDLA KALYANI, M. RAMA KRISHNA

1384-1389

An Efficient Security for Privacy Information through Hiding Data in Video Compressed Bit Streams

Authors:B. DIVYA BHARATHI, S. RAMA SUBBA REDDY

1390-1393

Curvelet Transform based Image De-noising using Feed Forward Artificial Neural Network

Authors:M. SRUTHI, V. NAGENDRA KUMAR, D. SHIVA

1394-1398